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| IMPORTANT NOTICE Dear customer, As from August 2nd 2008, the wireless operations of NXP have moved to a new company, ST-NXP Wireless. As a result, the following changes are applicable to the attached document. Company name - Philips Semiconductors is replaced with ST-NXP Wireless. Copyright - the copyright notice at the bottom of each page "(c) Koninklijke Philips Electronics N.V. 200x. All rights reserved", shall now read: "(c) ST-NXP Wireless 200x All rights reserved". Web site - http://www.semiconductors.philips.com is replaced with http://www.stnwireless.com Contact information - the list of sales offices previously obtained by sending an email to sales.addresses@www.semiconductors.philips.com, is now found at http://www.stnwireless.com under Contacts. If you have any questions related to the document, please contact our nearest sales office. Thank you for your cooperation and understanding. ST-NXP Wireless www.stnwireless.com TEA5761UK Low voltage single-chip FM stereo radio Rev. 01 -- 2 August 2006 Product data sheet 1. General description The TEA5761UK is a single-chip electronically tuned FM stereo radio for low-voltage applications with fully integrated IF selectivity and demodulation. The radio is completely adjustment free and only requires a minimum of small and low cost external components. The radio can tune to the European, US and Japanese FM bands. The radio does not meet all of the requirements of EN55020; a trade off has been implemented to achieve the following features. 2. Features s High sensitivity due to integrated low noise RF input amplifier s FM mixer for conversion of the US and Europe FM band (87.5 MHz to 108 MHz) and Japanese FM band (76 MHz to 90 MHz) to IF s Preset tuning to receive Japanese TV audio up to 108 MHz, raster 100 kHz s Auto search tuning, 100 kHz grid s RF automatic gain control circuit s LC tuner oscillator operating with one low-cost chip inductor; no need for external varicap s Fully integrated FM IF selectivity s Fully integrated FM demodulator; no external discriminator s Crystal oscillator at 32768 Hz, or external reference frequency at 32768 Hz s PLL synthesizer tuning system s IF counter; 7-bit output via the I2C-bus s Level detector; 4-bit level information output via the I2C-bus s Soft mute: signal dependent mute function s Mono/stereo blend: gradual change from mono to stereo, depending on signal; Stereo Noise Cancelling (SNC) s Soft mute and SNC can be switched off via the I2C-bus s Adjustment-free stereo decoder s I2C-bus interface s Autonomous search tuning function s Standby mode s MPX output s One software programmable port s Interrupt flag Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 3. Applications s FM stereo radio 4. Quick reference data Table 1: Quick reference data VCCA = VCCD = 2.7 V; Tamb = 25 C; unless otherwise specified.The listed parameters are valid when a crystal is used that meets the requirements as stated in Table 31. Symbol General [1] VCCA VCCD ICCA ICCD analog supply voltage digital supply voltage analog supply current digital supply current Operating mode Standby mode Operating mode Standby mode Reference voltage VVREFDIG IVREFDIG Tamb fi(FM) Vsens(EMF) digital reference voltage for I2C-bus interface digital reference supply current ambient temperature FM input frequency sensitivity EMF value voltage fRF = 76 MHz to 108 MHz; L = R; f = 22.5 kHz; fmod = 1 kHz; (S+N)/N = 26 dB; TCdeem = 75 s; A-weighting filter; Baud = 300 Hz to 15 kHz f1 = 200 kHz; f2 = 400 kHz; ftune = 76 MHz to 108 MHz; RFagc = off f1 = 4 MHz; f2 = 8 MHz; ftune = 76 MHz to 108 MHz; RFagc = off ftune = 76 MHz to 108 MHz high-side: f = +200 kHz low-side: f = -200 kHz VVAFL VVAFR left audio output voltage on pin VAFL VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; TCdeem = 75 s [2] Parameter Conditions Min 2.5 2.5 10 5 1 1.65 [1] Typ 2.7 2.7 14 2.0 3.3 1.8 0.5 2.2 Max 3.6 3.6 16.5 6.0 20 20 VCCD 2.0 +85 108 3.6 Unit V V mA A A A V A C MHz V VVREFDIG VCC Operating mode; VVREFDIG = 1.65 V to VCCD VCD1 = 2.7 V; VVREFDIG = 1.8 V -20 76 - FM overall system parameters IP3in IP3out in-band 3rd-order intercept point related to VRFIN1-RFIN2 out-of-band 3rd-order intercept point related to VRFIN1-RFIN2 selectivity 81 87 87 93 - dBV dBV S 39 32 60 60 43 36 75 75 90 90 dB dB mV mV right audio output voltage on VRF = 1 mV; L = R; f = 22.5 kHz; pin VAFR fmod = 1 kHz; TCdeem = 75 s 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 2 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Table 1: Quick reference data ...continued VCCA = VCCD = 2.7 V; Tamb = 25 C; unless otherwise specified.The listed parameters are valid when a crystal is used that meets the requirements as stated in Table 31. Symbol Parameter Conditions VRF = 1 mV; f = 22.5 kHz; L = R; fmod = 1 kHz; TCdeem = 75 s; Baud = 300 Hz to 15 kHz + A-weighted filter VRF = 1 mV; f = 75 kHz; including 9 % pilot deviation; R = 0 and L = 1 or R = 1 and L = 0; fmod = 1 kHz; bit MST = 0; bit SNC = 1; Baud = 300 Hz to 15 kHz Min 53 Typ 57 Max Unit dBA (S+N)/N(m) maximum signal-to-noise ratio, mono cs channel separation 22 27 - dB THD VRF = 1 mV; f = 75 kHz; fmod = 1 kHz; total harmonic distortion measured (at pins VAFL and L = R; TCdeem = 75 s; Baud = 300 Hz to VAFR) 15 kHz - 0.4 1 % [1] [2] Crystal influence not included. Low-side and high-side selectivity can be measured by changing the mixer LO injection from high-side to low-side. 5. Ordering information Table 2: Ordering information Package Name TEA5761UK WLCSP34 Description wafer level chip-size package; 34 bumps; 3.5 x 3.5 x 0.6 mm Version NAU000 Type number 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 3 of 44 xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x Product data sheet Rev. 01 -- 2 August 2006 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. 9397 750 13451 6. Block diagram Philips Semiconductors n.c. GNDA F2 FREQIN G1 XTAL F1 X1 VCCA E1 3.7 33 nF i.c. GNDA G2 G3 MPXOUT G4 VAFL F4 VAFR TMUTE G5 G6 F6 CRYSTAL OSCILLATOR GAIN STABILIZER TEA5761UK CD3 33 nF D2 IF FILTER LIMITER DEMODULATOR SOFT MUTE SDS FM antenna 10 nF LEVEL ADC I/Q MIXER 1st FM /2 N1 IF CENTER FREQUENCY ADJUST AGC IF COUNT MPX DECODER Iref G7 INTX F7 GNDD E6 i.c. E7 CD2 mono pilot 12 D7 VCCD 33 nF 100 pF 27 pF L1 120 nH 47 pF RFIN1 D1 RFIN2 C1 GNDRF C2 CAGC B1 agc prog. div out ref. div out TUNING SYSTEM I2C-BUS INTERFACE D6 GNDD C7 GNDD Low voltage single-chip FM stereo radio MUX VCO A1 LOOPSW 10 nF B7 SDA A7 SCL SW PORT A3 LO2 A4 CD1 B4 A5 SWPORT A6 BUSENABLE B6 VREFDIG 001aab486 B2 CPOUT 100 nF A2 LO1 n.c. 10 k L2 39 nH TEA5761UK 100 k 33 nF 4 of 44 Fig 1. Block diagram Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 7. Pinning information 7.1 Pinning ball A1 index area 1 A B C D E F G 001aab488 TEA5761UK 2 3 4 5 6 7 Transparent top view Fig 2. Pin configuration of WLCSP34 package 7.2 Pin description Table 3: Symbol LOOPSW LO1 LO2 CD1 SWPORT BUSENABLE SCL CAGC CPOUT n.c. VREFDIG SDA RFIN2 GNDRF GNDD RFIN1 CD3 GNDD VCCD VCCA i.c. CD2 9397 750 13451 Pin description Pin A1 A2 A3 A4 A5 A6 A7 B1 B2 B4 B6 B7 C1 C2 C7 D1 D2 D6 D7 E1 E6 E7 Description synthesizer PLL loop filter switch output local oscillator coil connection 1 local oscillator coil connection 2 VCO supply decoupling capacitor software programmable port output I2C-bus enable input I2C-bus clock line input RF AGC time constant capacitor charge pump output of synthesizer PLL not connected digital reference voltage for I2C-bus I2C-bus data line input and output RF input 2 RF ground digital ground RF input 1 VCCA decoupling capacitor digital ground digital supply voltage analog supply voltage internally connected; leave open VCCD decoupling capacitor (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 5 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Pin description ...continued Pin F1 F2 F4 F6 F7 G1 G2 G3 G4 G5 G6 G7 Description crystal oscillator input analog ground left audio output internally connected; leave open digital ground 32.768 kHz reference frequency input analog ground not connected FM demodulator MPX output right audio output soft mute time constant capacitor interrupt flag output Table 3: Symbol XTAL GNDA VAFL i.c. GNDD FREQIN GNDA n.c. MPXOUT VAFR TMUTE INTX 8. Functional description 8.1 Low noise RF amplifier The LNA input impedance together with the LC RF input circuit defines an FM band filter. The gain of the LNA is controlled by the RF AGC circuit. 8.2 I/Q mixer 1st FM The FM quadrature mixer converts FM RF (76 MHz to 108 MHz) to IF. 8.3 VCO The LC tuned VCO provides the Local Oscillator (LO) signal for the FM quadrature mixer. The VCO frequency range is from 150 MHz to 217 MHz. No external varactor is required. 8.4 Crystal oscillator The crystal oscillator can operate with a 32.768 kHz clock crystal or via an external 32.768 kHz reference clock source connected to pin FREQIN. Selection between a reference clock or a reference crystal can be done by software programming via the I2C-bus. When a clock crystal is used, pin FREQIN must be left open-circuit, or when external clocking is used, there should be no crystal connected to pin XTAL. The temperature drift of 32.768 kHz clock crystals limits the operational temperature range. The preferred crystal specifications are given in Table 31. The crystal oscillator generates the reference frequency for: * * * * 9397 750 13451 Synthesizer PLL tuning system Timing for the IF counter Free running frequency adjustment of the stereo decoder VCO Center frequency adjustment of the IF filters (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 6 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 8.5 PLL tuning system The PLL synthesizer tuning system is suitable to operate with a 32.768 kHz reference frequency generated by the crystal oscillator or a reference clock of 32.768 kHz fed into the TEA5761UK. To tune the radio to the required frequency requires the PLL word to be calculated and then programmed to the register. The PLL word is 14 bits long; see Table 12 and Table 13. Calculation of this 14-bit word can be done as follows. Formula for high-side injection: 4 x ( f RF + f IF ) N DEC = ------------------------------------f ref Formula for low-side injection: 4 x ( f RF - f IF ) N DEC = ------------------------------------f ref where: NDEC = decimal value of PLL word fRF = wanted tuning frequency (Hz) fIF = intermediate frequency of 225 kHz fref = reference frequency of 32.768 kHz Example for receiving a channel at 100.1 MHz: 4 x ( 100.1 x 10 + 225 x 10 ) N DEC = ----------------------------------------------------------------------- = 12246.704 32768 6 3 (1) (2) (3) The result found using Equation 1 or Equation 2 must always be rounded to the lowest integer value. If rounded down to the lowest integer value of NDEC = 12246, the PLL word becomes 2FD6h. This value can be written to register FRQSET via the I2C-bus and the TEA5761UK will then start an autonomous search at this frequency or go to a preset channel at this frequency. When the application is built according to the application diagram (see Figure 13) and with the preferred components, the PLL will settle to the new frequency within 40 ms. The PLL is triggered by writing to any one of the bytes FRQSETMSB, FRQSETLSB, TNCTRL1, TNCTRL2, TESTBITS, TESTMODE. Accurate validation of the PLL locking on the new frequency can take 40 ms. When a lock is detected bit LD is set. 8.6 Band limits The TEA5761UK can be switched to the Japanese FM band or to the US and Europe FM band. Setting bit BLIM to logic 0 the band range is 87.5 MHz to 108 MHz; setting bit BLIM to logic 1 selects the Japanese band range of 76 MHz to 90 MHz. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 7 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 8.7 RF AGC The RF AGC prevents overloading and limits the amount of intermodulation products created by strong adjacent channels. The RF AGC is on by default and can be turned off via the I2C-bus. The TEA5761UK also has an in-band AGC to prevent overloading by the wanted channel. The in-band AGC is always turned on. 8.8 Local or long distance receive If bit LDX = 1, the LNA gain is reduced by 6 dB to prevent distortion when a transmitter is very near. If bit LDX = 0, the LNA gain is normal to receive long distance (DX) stations. 8.9 IF filter A fully integrated IF filter with a center frequency of 225 kHz is built-in. 8.10 FM demodulator The FM quadrature demodulator has an integrated resonator to perform the phase shift of the IF signal. 8.11 IF counter The received signal is mixed to an IF of 225 kHz. The result of the mixing is counted. A good IF count result indicates that the radio is tuned to a valid channel instead of an image or a channel with much interference. The IF counter outputs a 7-bit count result via the I2C-bus. The IF counter is continuously active and can be read at any time via the I2C-bus. It also activates a flag when the IF count result is outside the IF count valid result window; see Section 9.2.2. The IF count period can be set to 1.953 ms or 15.625 ms by bit IFCTC. 8.12 Voltage level generator and analog-to-digital converter The voltage level indicates the field strength received by the antenna. The voltage level is analog-to-digital converted to a 4-bit word and output via the I2C-bus. The ADC level is continuously active and can be read at any time via the I2C-bus. It also activates a flag when the voltage level falls under a predefined selectable threshold. Bit LHSW allows either large or small hysteresis steps to be chosen; see Table 21 and Section 9.2.3. 8.13 Mute 8.13.1 Soft mute The low-pass filtered level voltage drives the soft mute attenuator at low RF input levels: the audio output is faded and hence also the noise (curves 1 and 2 of Figure 12). The soft mute function can also be toggled via the I2C-bus, using bit SMUTE. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 8 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 8.13.2 Hard mute The audio outputs VAFL and VAFR can be hard muted by bit MU in byte TNCTRL2 which means they are put into 3-state. This can also be done by setting bits Left Hard Mute (LHM) or Right Hard Mute (RHM) in byte TESTBITS, which allows either one or both channels to be muted and forces the TEA5761UK to Mono mode. When the TEA5761UK is in Standby mode the audio outputs are hard muted. 8.13.3 Audio frequency mute The audio signal is muted by setting bit AFM of the TNCTRL1 register to logic 1. In the soft mute attenuator the audio signal is blocked and so pins VAFL and VAFR will be at their DC biasing point with no signal. The audio is automatically muted during a preset as shown in the flowchart of Figure 3. When the audio must be muted during Search mode, it is done by setting bit AFM to logic 1 before the search action and resetting it to logic 0 afterwards. Table 4: Specification of Mute modes Bit AFM = 1 MU = 1 LHM = 1 RHM = 1 PUPD = 0 SMUTE = 1 MPX output Impedance State Audio frequency mute Hard mute Left hard mute Right hard mute Standby mute Soft mute 500 500 500 500 3-state muted muted audio audio muted VAFL output (left) Impedance State 50 3-state 3-state 50 3-state muted muted muted muted VAFR output (right) Impedance State 50 3-state 50 3-state muted muted mono audio muted muted Mute mode mono audio 3-state RF level sensitive audio level; has no influence on mute or output impedance 8.14 MPX decoder The PLL stereo decoder is adjustment free. It can be switched to mono via the I2C-bus. 8.15 Signal dependent mono/stereo blend (stereo noise cancellation) If the RF input level decreases, the MPX decoder blends from stereo to mono to limit the output noise. The continuous mono-to-stereo blend can also be programmed via the I2C-bus to an RF level dependent switched mono-to-stereo transition. Stereo noise cancellation can be switched off via the I2C-bus by bit SNC. 8.16 Software programmable port The software programmable port (CMOS output) can be addressed via the I2C-bus: * Bit SWPM = 1: port functions as the output for bit FRRFLAG. * Bit SWPM = 0: port outputs the level corresponding to bit SWP. In Test mode, the software port outputs signals according to Table 23. Test mode is selected by setting bit TM of byte TESTMODE to logic 1. The programmed output status of the software port remains, independent of bit PUPD; see Section 8.17. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 9 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 8.17 Standby mode The radio can be put into Standby mode by Power-Up / Power-Down bit PUPD. In this mode, the FM part can be turned off. The TEA5761UK is still accessible via the I2C-bus but takes only very low power from the supply. In Standby mode, the audio outputs are hard muted. When the supply voltages VCCA and VCCD are made 0 V and VREFDIG = HIGH, all inputs and outputs, the audio outputs and the reference clock input are in high-impedance state. The power supplies can be switched on in any order. 8.18 Power-on reset After start-up of VCCA and VCCD a power-on reset circuit will generate a reset pulse and the registers will be set to their default values. The power-on reset is effectively generated by VCCD. At power-on reset, the mute is set and all other bits are set to the reset value as given in Table 9. To initialize the TEA5761UK all bytes have to be transferred. 8.19 I2C-bus interface The I2C-bus interface operates with a maximum clock frequency of 400 kHz. When, during operation, the signal on pin BUSENABLE is toggled, the device will not generate an I2C-bus acknowledge bit on the first following I2C-bus transmission. It is then necessary to send either the I2C-bus address two times prior to the complete transmission or send the complete I2C-bus transmission twice. After this, the I2C-bus communication is restored in the normal behavior. Now an I2C-bus acknowledge is generated on each transmitted byte again. 8.20 Auto search and Preset mode 8.20.1 Search mode In Search mode the IC can search channels automatically; see Figure 3. When the INTX signal is used as an interrupt to the microcontroller to indicate a search stop, the INTMSK register must be reset and only bit FRRMSK must be set. In this way the microcontroller will only be interrupted when the search or preset algorithm is ready. Search mode is initiated by setting bit SM in byte FRQSETMSB to logic 1. The search direction is set by bit SUD; bit SUD = 0 (search down), bit SUD = 1 (search up). The tuner starts searching at the frequency from where it is or at a start frequency set in bytes FRQSETLSB and FRQSETMSB. The Search Stop Level (SSL) bits define the field strength level at which a desired channel is detected. The tuner will stop on a channel with a field strength equal to or higher than this reference level and then checks the IF frequency; when both are valid, the search stops. If the level check or the IF count fails, the search continues. If no channels are found, the TEA5761UK stops searching when it has reached the band limit, setting bit BLFLAG HIGH. A search always stops when the FRRFLAG is set and on the occurrence of a hardware interrupt, this procedure is shown in Figure 3. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 10 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio The search algorithm can stop at a frequency that is offset from the IF by up to a maximum of 12 kHz. The maximum offset can be limited to 8 kHz by applying a preset. For optimum tuning, it is recommended that a preset is applied after a search and when the found frequency has an offset that is above 8 kHz. After this interrupt the TEA5761UK will not update the tuner registers INTREG, FRQCHK and TUNCHK for a period of 15 ms. The state of the TEA5761UK can be checked by reading registers INTREG, FRQCHK and TUNCHK. Table 5 shows the possible states of these registers after an auto search. 8.20.2 Preset mode A preset occurs by setting bit SM to logic 0 and writing a frequency to register FRQSET. The tuner jumps to the selected frequency and sets bit FRRFLAG when it is ready. After this interrupt the TEA5761UK will not update the tuner registers INTREG, FRQCHK and TUNCHK for a period of 15 ms. The state of the TEA5761UK can be checked by reading registers INTREG, FRQCHK and TUNCHK. Table 5 shows the possible states after a preset. Table 5: Bit IFFLAG BLFLAG FRRFLAG 0 0 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 if pin INTX = LOW and bits IFMSK, LEVMSK, FRRMSK and BLMSK were set, then this cannot occur channel found during search; bits BLMSK and FRRMSK are set not a valid combination channel found and the band limit has been reached during a search; bits BLMSK and FRRMSK are set not possible during a preset or a search a preset or search has been done and the wanted channel has a valid RSSI level but the IF count fails; if bit AHLSI = 1, then bit HLSI must be toggled and a new PLL value must be programmed not a valid combination band limit is reached during search; no valid channel found Tuner truth table Comment 1 1 1 1 0 1 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 11 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio start during a preset mute is always active search mode is default not muted unless bit AFM is set or bit AHLSI is set reset flags set PLL frequency wait for PLL to settle level OK true false set LEVFLAG IF OK true false AHLSI true false false search mode true false search up true increment current_pll by 100 kHz decrement current_pll by 100 kHz band limit true BLFLAG = 0 FRRFLAG = 1 no mute BLFLAG = 0 FRRFLAG = 1 mute BLFLAG = 1 FRRFLAG = 1 no mute false 001aab461 Fig 3. Flowchart auto search or preset 8.20.3 Auto high-side and low-side injection stop switch When a channel is searched or a preset is done, reception can sometimes be improved when Local Oscillator (LO) injection is done at the other side of the wanted channel. Bit HLSI toggles the injection of the local oscillator from high-side (bit HLSI = 1) to low-side (bit HLSI = 0). When bit HLSI is toggled, a new PLL setting must be sent to the TEA5761UK. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 12 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio When bit AHLSI is set to logic 1, the search or preset algorithm will stop after a channel has a valid RSSI level check, but fails the IF count. The microcontroller can now respond by toggling bit HLSI and sending a new PLL value to the tuner. image on low-side wanted channel image on high-side switch LO from high-side to low-side 001aab460 Fig 4. Switch LO from high-side injection to low-side injection using bit HLSI 8.20.4 Muting during search or preset During a preset the tuner is always muted and is implemented by the algorithm. A search is not muted by default unless bit AFM = 1 or bit AHLSI = 1. When bit AHLSI = 1 and the tuner stops during a preset or a search because of a wrong IF count, the tuner stays muted; this allows the microcontroller to switch LO injection mode quietly and wait for the new result. The tuner is always muted if bit AFM = 1 and is independent of a search or a preset. A search can be muted by setting bit AFM to logic 1 before a search is initiated and resetting it to logic 0 when the tuner is ready (only set bit FRRMSK when initiating a search or preset). All these mute actions are done by blocking the audio signal inside the soft mute attenuator, so the audio output will keep its DC level and stay low-impedance i.e. 50 (a hard mute set by bit MU will cause a plop). 9. Interrupt handling 9.1 Interrupt register The first two bytes of the I2C-bus register contain the interrupt masks and the interrupt flags. A flag is set when it is a logic 1. Table 6: Bit Symbol Table 7: Bit Symbol INTFLAG register- byte0R 7 6 5 4 IFFLAG 3 LEVFLAG 2 1 FRRFLAG 0 BLFLAG INTMSK register - byte0W or byte1R 7 6 5 4 IFMSK 3 LEVMSK 2 1 FRRMSK 0 BLMSK 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 13 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio The interrupt flag register contains the flags set according to the behavior outlined in Section 9.2. When these flags are set they can also cause pin INTX to go active (hardware interrupt line) depending on the status of the corresponding mask bit in Table 7. A logic 1 in the mask register enables the hardware interrupt for that flag. Hence, it is conceivable that, with all the mask bits cleared, the software could operate in a continuous polling mode that reads the interrupt flag register for any bits that may be set. Interrupt mask bits are always cleared after reading the first two bytes of the interrupt register. This is to control multiple hardware interrupts; see Figure 5. 9.1.1 Interrupt clearing The interrupt flag and mask bits are always cleared after: * they have been read via the I2C-bus * a power-on reset 9.1.2 Timing The timing sequence for the general operation interrupts is shown in Figure 5 and shows a read access of the interrupt register INTFLAG and a subsequent (though not necessarily immediate) write to the mask register INTMSK. It also indicates the two key timing points A and B1 or B2. If an interrupt event occurs while the register is being accessed (after point A), it must be held until after the mask register is cleared at the end of the read operation (point B2). Point A is after the R/W bit has been decoded and point B2 is where the acknowledge has been received from the master after the first two bytes have been sent. The LOW time for the INTX line (tL) has a maximum value specified in Table 30. However, it can be shorter if a read of the INTMSK and INTFLAG registers occurs within tL. 9.1.3 Reset A reset can be performed at any time by a simple read of the interrupt registers (byte0R and byte1R), which automatically clears the interrupt flags and masks. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 14 of 44 xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx Product data sheet Rev. 01 -- 2 August 2006 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. 9397 750 13451 Philips Semiconductors read access INTFLAG INTMSK write access INTMSK FRQSETMSB FRQSETLSB data S device address R ack 0R data ack 1R data ack data ack S device address W ack 0W data ack 1W data ack 2W data ack P (2) interrupt event (1) A B1 B2 interrupt flag bit (3) interrupt mask bit (4) (5) INTX (6) (5) 001aab464 Low voltage single-chip FM stereo radio (1) Interrupt events that occur outside of the region A to B1 or B2 set their respective flag bits in the normal way immediately and can thus trigger a hardware interrupt if the mask bits are set. (2) The blocking of interrupts is marked by the region A to B1 or B2, depending on the actual read cycle. B1 is when only the INTFLAG register is read and a stop condition is received (only INTFLAG is read, so only this will be cleared). B2 is when both registers are read and hence cleared; this is terminated by either an acknowledge or stop bit. (3) Interrupt events that occur between A and B1 or B2 set their respective flags after the mask bits are cleared. This means that in this diagram an interrupt event occurred in period A to B1 or B2, so after period A to B2 the flag goes to logic 1. (4) All interrupt mask bits are cleared after the interrupt flag and mask registers are read. (5) Software writes to the mask register and enables the required mask bits. Any flags currently set will then trigger a hardware interrupt. (6) Pin INTX is set HIGH (inactive) after the interrupt flag and mask registers are read. TEA5761UK 15 of 44 Fig 5. I2C-bus interrupt sequence, read and write operation Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 9.2 Interrupt flags and behavior 9.2.1 Multiple interrupt events If the interrupt mask register bit is set then the setting of an interrupt flag for that bit causes a hardware interrupt (pin INTX goes LOW). If the event occurs again, before the flag is cleared, then this does not trigger any further hardware interrupts until that specific flag is cleared. However, two different events can occur in sequence and generate a sequence of hardware interrupts. A second interrupt can be generated only after the INTMSK byte is read, followed by a write as the first interrupt blocks the input of the INTX one-shot generator. If subsequent interrupts occur within the INTX LOW period then these do not cause the INTX period to extend beyond its specified maximum period (see Section 9.3). 9.2.2 IF frequency flag During automatic frequency search or preset, the FM part of the TEA5761UK performs a check of the received IF frequency. If an incorrect IF frequency is received, it indicates a detuning situation or the presence of either strong interferers or tuning to an image which sets bit IFFLAG in the INTFLAG register. Also a preset to a channel with no signal may result in a wrong IF count value and hence the setting of bit IFFLAG. When a search or preset is finished, bit FRRFLAG will be set to indicate this and an interrupt is generated. The microcontroller can now read the outcome of the registers which will contain the IF count value and the IFFLAG status of the channel it is tuned to. 15 ms after the FRRFLAG flag has been set the IF counter will start to run continuously on the tuned frequency and if the conditions for correct frequency are not met then this sets bit IFFLAG in the interrupt register. When bit IFMSK is set this will also cause an interrupt. Bit IFFLAG is cleared by reading byte0R, or by starting the tuning algorithm. 9.2.3 RSSI threshold flag The RSSI level voltage reflects the field strength received by the antenna. The voltage level is analog-to-digital converted to a 4-bit value and output via the I2C-bus. This 4-bit level value can be compared to a threshold level (see Table 21). The level ADC (which converts the analog value to digital) can be triggered to convert in two ways: 1. During a tuning step, which can be a search or a preset, it is triggered by these algorithms and compares the level with the threshold set by bits SSL[1:0]. Bit LEVFLAG is set if the RSSI level drops below the threshold level set by bits SSL[1:0]; see Table 15. The hardware interrupt is only generated if the corresponding mask bit is set. 2. After a search or a preset, the threshold for comparison is switched to the hysteresis level. The hysteresis level is set by the level bits and can be selected using bit LHSW (see Table 21). Then it waits 15 ms and the level ADC starts to run automatically and compares the level each 500 s with this hysteresis level. Bit LEVFLAG is set if the RSSI level drops below the threshold level set by the LH bits; the hardware interrupt is only generated if the corresponding mask bit is set. Bit LHSW allows either a small or a large hysteresis to be selected. When a search or preset is done with the ADC level set to 3 then when the algorithm has finished, the threshold level is set to 0. Hence the LEVFLAG will never be set. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 16 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Bit LEVFLAG is cleared when the interrupt register INTFLAG is read. 9.2.4 Frequency ready flag The frequency ready flag bit FRRFLAG is set to logic 1 when the automatic tuning has finished a search or preset. The description of this bit is given in Table 5. This bit is cleared when the INTMSK register is read. 9.2.5 Band limit flag The band limit bit BLFLAG is set to logic 1 when the automatic tuning has detected the end of the tuning band or when the PLL cannot lock on a certain frequency. This bit is described in Table 5. This bit is cleared when the INTMSK register is read. 9.3 Interrupt output The interrupt line driver is a MOS transistor with a nominal sink current of 380 A. It is pulled HIGH by an 18 k resistor connected to pin VREFDIG. The interrupt line can be connected to one other similar device with an interrupt output and an 18 k pull-up resistor providing a wired-OR function. This allows any of the drivers to pull the interrupt line LOW by sinking the current. When a flag is set and not masked it generates an interrupt; see Figure 6. VCCA flag(1) INTX 10 ms read INTMSK(2) <10 ms read clears INTX 10 ms <10 ms write INTMSK(3) 001aab489 (1) When flag is set, the next interrupts are blocked until INTMSK is read from or written to. (2) Reading INTMSK clears flag, INTMSK and INTX. (3) Writing INTMSK enables INTX. Fig 6. Interrupt line behavior 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 17 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 10. I2C-bus interface The I2C-bus interface is based on The I2C-bus specification, version 2.1 January 2000, expanded by the following definitions. 10.1 Write and Read mode S BYTE 1 chip address 0010 0000 R/W 0 A BYTE 2 byte0W xxxx xxxx A BYTE n ..... xxxx xxxx A BYTE 8 byte6W xxxx xxxx NAK P 001aac341 Fig 7. Write mode S BYTE 1 chip address 0010 0000 R/W 1 A BYTE 2 byte0R xxxx xxxx A BYTE n ..... xxxx xxxx A BYTE 17 byte15R xxxx xxxx A P 001aac342 Fig 8. Read mode Table 8: Code S Byte 1 A Byte 2, etc. NAK P I2C-bus transfer description Description START condition I2C-bus chip address (7 bits) R/W = 0 for write action and R/W = 1 for read action acknowledge (SDA = LOW) data byte (8 bits) non acknowledge (SDA = HIGH) STOP condition 10.2 Data transfer Structure of the I2C-bus: * * * * Slave transceiver Subaddresses not used Maximum LOW-level input voltage: VIL = 0.3 x VVREFDIG Minimum HIGH-level input voltage: VIH = 0.7 x VVREFDIG Remark: The I2C-bus operates at a maximum clock rate of 400 kHz. It is not allowed to connect the TEA5761UK to an I2C-bus operating at a higher clock rate. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 18 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Data transfer to the TEA5761UK: * Bit 7 of each byte is considered the MSB and has to be transferred as the first bit of the byte. * The LSB indicates the write or read action. * The data becomes valid byte-wise at the appropriate falling edge of the SCL clock. * A STOP condition after any byte can shorten transmission times. When writing to the transceiver by using the STOP condition before completion of the whole transfer: - The remaining bytes will contain the old information. - If the transfer of a byte is not completed the new bits will be used, but a new tuning cycle will not be started. I2C-bus activity: * With bit PUPD the TEA5761UK can be switched in a low current Standby mode. The I2C-bus is then still active. * When the I2C-bus interface is deactivated, by making pin BUSENABLE LOW and without programmed Standby mode, the TEA5761UK keeps its normal operation, but is isolated from the I2C-bus lines. * Bus traffic can be started 10 s after activating the bus again by making pin BUSENABLE HIGH. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 19 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio SDA tf tr t BUF SCL P S t HD;STA t SU;BUSEN BUS ENABLE 001aac796 Sr t SU;STO t SU;DAT t HD;DAT t HIGH t LOW t SU;STA t HO;BUSEN P tf = fall time of both SDA and SCL signals: 20 + 0.1 Cb < tf < 300 ns, where Cb = total capacitance on bus line in pF. tr = rise time of both SDA and SCL signals: 20 + 0.1 Cb < tr < 300 ns, where Cb = total capacitance on bus line in pF. tHD;STA = hold time (repeated) START condition. After this period, the first clock pulse is generated: > 600 ns. tHIGH = HIGH period of the SCL clock: > 600 ns. tSU;STA = setup time for a repeated START condition: > 600 ns. tHD;DAT = data hold time: 300 < tHD;DAT < 900 ns. Remark: 300 ns lower limit is added because the ASIC has no internal hold time for the SDA signal. tSU;DAT = data setup time: tSU;DAT > 100 ns. If ASIC is used in a standard mode I2C-bus system, tSU;DAT > 250 ns. tSU;STO = setup time for STOP condition: > 600 ns. tBUF = bus free time between a STOP and a START condition: > 600 ns. Cb = capacitive load of one bus line: < 400 pF. tSU;BUSEN = bus enable setup time: tSU;BUSEN > 10 s. tHO;BUSEN = bus enable hold time: tHO;BUSEN > 10 s. Fig 9. Bus timing diagram 10.3 Register map Table 9: Read 0R 1R 2R 3R 4R 5R 6R 7R 8R 9R 10R 9397 750 13451 Register overview Byte name Write INTFLAG 0W 1W 2W 3W 4W INTMSK FRQSETMSB FRQSETLSB TNCTRL1 TNCTRL2 FRQCHKMSB FRQCHKLSB IFCHK LEVCHK 5W TESTBITS R R/W R/W R/W R/W R/W R R R R R/W 00h 00h 80h 00h 08h D2h 00h Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Table 17 Table 18 Table 19 Table 20 Access Reset value Reference Byte number (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 20 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Register overview ...continued Byte name Write 6W TESTMODE MANID1 MANID2 CHIPID1 CHIPID2 R/W R R R R 00h 40h 2Bh 57h 61h Table 22 Table 24 Table 25 Table 26 Table 27 Access Reset value Reference Table 9: Read 11R 12R 13R 14R 15R Byte number 10.4 Byte description Table 10: Bit 7 to 5 4 3 IFFLAG LEVFLAG INTFLAG - interrupt flag byte0R description Symbol Access Reset R R 0 0 Description reserved 1 = IF count is not correct continuous checking of the RSSI level 1 = RSSI level has dropped below VSSL[1:0] - Vhys during a tuning cycle (preset or search) 1 = RSSI level has dropped below VSSL[1:0] 2 1 0 BLFLAG R 0 0 1 = tuner state machine is ready 1 = during a search the band limit has been reached or time out FRRFLAG R Table 11: Bit 7 to 5 4 3 2 1 0 Table 12: Bit 7 6 - INTMSK - interrupt mask byte1R and byte0W description Symbol IFMSK LEVMSK FRRMSK BLMSK Access Reset R/W R/W R/W R/W 0 0 0 0 Description reserved masks bit IFFLAG masks bit LEVFLAG reserved masks bit FRRFLAG masks bit BLFLAG FRQSETMSB - frequency setting MSB byte2R and byte1W description Symbol SUD SM Access Reset R/W R/W 0 1 Description 1 = search up 0 = search down 1 = Search mode 0 = Preset mode 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 21 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio FRQSETMSB - frequency setting MSB byte2R and byte1W description ...continued Symbol FR13 FR12 FR11 FR10 FR09 FR08 Access Reset R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 Description PLL frequency set bits Table 12: Bit 5 4 3 2 1 0 Table 13: Bit 7 6 5 4 3 2 1 0 Table 14: Bit 7 6 - FRQSETLSB - frequency setting LSB byte3R and byte2W description Symbol FR07 FR06 FR05 FR04 FR03 FR02 FR01 FR00 Access Reset R/W R/W R/W R/W R/W R/W R/W R/W 1 1 0 1 0 0 1 0 Description PLL frequency set bits TNCTRL1 - tuner control register byte4R and byte3W description Access Reset R/W 0 0 Description reserved power-up and power-down 1 = FM on 0 = FM off 1 = Japanese FM band 76 MHz to 90 MHz 0 0 = US/Europe FM band 87.5 MHz to 108 MHz 1 = output pin SWPORT is bit FRRFLAG 0 0 = output pin SWPORT is bit SWP 1 = IF count time is 15.625 ms 0 = IF count time is 1.953 ms 1 = left and right audio muted 0 0 = audio not muted 1 = soft mute on 0 0 = soft mute off 1 = stereo noise cancellation on 0 0 = stereo noise cancellation off 1 Symbol PUPD0 5 4 3 2 1 0 BLIM SWPM IFCTC AFM SMUTE SNC R/W R/W R/W R/W R/W R/W 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 22 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio TNCTRL2 - tuner control register byte5R and byte4W description Access Reset R/W R/W 1 Description 1 = left and right audio hard mute 0 = no hard mute search stop level (see Table 21) 00 = ADC3 01 = ADC5 10 10 = ADC7 11 = ADC10 1 = high-side injection 0 = low-side injection 1 = forced mono 0 0 = stereo on 1 = pin SWPORT is HIGH 0 0 = pin SWPORT is LOW 1 = de-emphasis time constant = 50 s 0 = de-emphasis time constant = 75 s 1 = tuner will stop during search on failed IF count and correct level 0 0 = tuner will search continuously 1 Table 15: Bit 7 MU Symbol 6 to 5 SSL[1:0] 4 3 2 1 0 HLSI MST SWP DTC AHLSI R/W R/W R/W R/W R/W 1 Table 16: Bit 7 6 5 4 3 2 1 0 - FRQCHKMSB - frequency check register byte6R description Access Reset R R R R R R Description reserved reserved frequency found bit 13 (MSB) frequency found bit 12 frequency found bit 11 frequency found bit 10 frequency found bit 9 frequency found bit 8 Symbol PLL13 PLL12 PLL11 PLL10 PLL09 PLL08 Table 17: Bit 7 6 5 4 3 2 1 0 FRQCHKLSB - frequency check register byte7R description Access Reset R R R R R R R R Description frequency found bit 7 frequency found bit 6 frequency found bit 5 frequency found bit 4 frequency found bit 3 frequency found bit 2 frequency found bit 1 frequency found bit 0 (LSB) Symbol PLL07 PLL06 PLL05 PLL04 PLL03 PLL02 PLL01 PLL00 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 23 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio IFCHK - tuner check register byte8R description Access Reset R R R R R R R R Description IF count bit 6 (MSB) IF count bit 5 IF count bit 4 IF count bit 3 IF count bit 2 IF count bit 1 IF count bit 0 (LSB) 1 = PLL tuning time out 0 = PLL has settled Table 18: Bit 7 6 5 4 3 2 1 0 IF6 IF5 IF4 IF3 IF2 IF1 IF0 Symbol TUNTO Table 19: Bit 7 6 5 4 3 2 [1] 1 0 [1] LEVCHK - tuner check register byte9R description Access Reset R R R R R R Description level count bit 3 (MSB) level count bit 2 level count bit 1 level count bit 0 (LSB) 1 = PLL is locked 0 = PLL is not locked 1 = Pilot detected 0 = no Pilot detected reserved reserved Symbol LEV3 LEV2 LEV1 LEV0 LD STEREO - This bit does not switch the radio from mono to stereo, this depends on the RF input level as shown in sections `Mono stereo blend' and Mono stereo switched' in Table 33. Table 20: Bit 7 6 5 4 3 2 TESTBITS - test bits register byte10R and byte5W description Access Reset R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 0 Description 1 = left audio output is hard muted 0 = left audio output is not hard muted 1 = right audio output is hard muted 0 = right audio output is not hard muted 1 = level hysteresis is large (see Table 21) 0 = level hysteresis is small 1 = reference frequency selected pin FREQIN 0 = crystal as reference pin XTAL 1 = local DX on, -6 dB gain of LNA 0 = local DX off, LNA has normal gain Symbol LHM RHM LHSW TRIGFR LDX 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 24 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio TESTBITS - test bits register byte10R and byte5W description ...continued Access Reset R/W 0 R/W 0 Description 1 = RF AGC off 0 = RF AGC on 1 = interrupt generation on pin INTX enabled 0 = interrupt generation disabled Table 20: Bit 1 0 Symbol RFAGC INTCTRL Table 21: LH - RSSI level hysteresis RSSI ADC search stop level 3 5 7 10 Bit LHSW X 1 0 1 0 1 0 RSSI hysteresis threshold level 0 1 2 3 4 5 7 Bits SSL[1:0] 00 01 10 11 Table 22: Bit 7 6 5 4 TESTMODE - Test mode register byte11R and byte6W description Access Reset R/W 0 R/W 0 Description 1 = fast 4 ms 0 = slow 8 ms reserved reserved 1 = TEA5761UK in Test mode and software port outputs according to Table 23 0 = normal operation test bits select the signals outputted to pin SWPORT when bit SWPM = 0; see Table 23 0 0 0 0 Symbol DETT TM 3 2 1 0 TB3 TB2 TB1 TB0 R/W R/W R/W R/W Table 23: TB3 0 0 0 0 0 0 : 1 Test bits (SWPM = 0) TB2 0 0 0 0 1 1 : 1 TB1 0 0 1 1 0 0 : 1 TB0 0 1 0 1 0 1 : 1 Pin SWPORT output bit SWP of byte 4W or bit FRRFLAG (SWPM = 1) oscillator output 32.768 kHz (TM = 1) lock detect bit LD (TM = 1) pilot detected (TM = 1) programmable divider (TM = 1) reserved : reserved 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 25 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio MANID1 - manufacturer identification register byte12R description Access Reset R R R R R R R R 0 1 0 0 0 0 0 0 manufacturer ID code; default 0000 (001 0101) Description version code; default 0100 Table 24: Bit 7 6 5 4 3 2 1 0 Symbol VERSION3 VERSION2 VERSION1 VERSION0 MANID10 MANID9 MANID8 MANID7 Table 25: Bit 7 6 5 4 3 2 1 0 MANID2 - manufacturer identification register byte13R description Access Reset R R R R R R R R 0 0 1 0 1 0 1 1 1 = chip has manufacturer ID 0 = chip has no ID Description manufacturer ID code; default (0000) 001 0101 Symbol MANID6 MANID5 MANID4 MANID3 MANID2 MANID1 MANID0 IDAV Table 26: Bit 7 6 5 4 3 2 1 0 CHIPID1 - chip identification register byte14R description Access Reset R R R R R R R R 0 1 0 1 0 1 1 1 TEA5761UK chip identification code: 2nd digit = 7 Description TEA5761UK chip identification code: 1st digit = 5 Symbol CHIPID15 CHIPID14 CHIPID13 CHIPID12 CHIPID11 CHIPID10 CHIPID9 CHIPID8 Table 27: Bit 7 6 5 4 CHIPID2 - chip identification register byte15R description Access Reset R R R R 0 1 1 0 Description TEA5761UK chip identification code: 3rd digit = 6 Symbol CHIPID7 CHIPID6 CHIPID5 CHIPID4 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 26 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio CHIPID2 - chip identification register byte15R description ...continued Access Reset R R R R 0 0 0 1 Description TEA5761UK chip identification code: 4th digit = 1 Table 27: Bit 3 2 1 0 Symbol CHIPID3 CHIPID2 CHIPID1 CHIPID0 11. Limiting values Table 28: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCCD VCCA VLO1 VLO2 Tstg Tamb Vesd Parameter digital supply voltage analog supply voltage VCO tuned circuit output 1 VCO tuned circuit output 2 storage temperature ambient temperature electrostatic discharge voltage HBM CDM MM [1] [2] [3] Human body model (R = 1.5 k, C = 100 pF). Charged device model ("JEDEC standard JESD22-C101"). Machine model (R = 0 , C = 200 pF). [1] [2] [3] Conditions Min -0.3 -0.3 -0.3 -0.3 -55 -40 - Max +5.5 +8 +8 +8 +150 +85 2000 500 200 Unit V V V V C C V V V 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 27 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 12. Static characteristics Table 29: Supply characteristics The listed parameters are valid when a crystal is used with the requirements stated in Table 31. Symbol VCCA VCCD ICCA Parameter analog supply voltage digital supply voltage analog supply current VCCA = 2.7 V Operating mode Standby mode ICCD digital supply current VCCD = 2.7 V Operating mode Standby mode Tamb Ptot [1] Conditions Min 2.4 2.4 10 5 1 [1] Typ 2.7 2.7 14 2.0 15 3.3 38 Max 3.6 3.6 16.5 6.0 20 20 +85 - Unit V V mA A A A C mW ambient temperature total power dissipation VCCA = VCCD = 2.7 V; VCD1 = 2.7 V; VVREFDIG = 1.8 V -20 - Crystal influence not included. Table 30: Control input and output characteristics VCCA = VCCD = 2.7 V; Tamb = 25 C; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified. Symbol VVREFDIG IVREFDIG Parameter I2C-bus digital reference voltage digital reference current Conditions interface: pin VREFDIG VVREFDIG VCCD Operating mode; VVREFDIG = 1.65 V to VCCD 1.65 1.8 0.5 VCCD 2.0 V A Min Typ Max Unit Reference for Logic inputs: pins BUSENABLE, SCL and SDA Ri VIH VIL input resistance HIGH-level input voltage LOW-level input voltage input switching level up input switching level down Isource = 150 A Isink = 150 A 10 M 0.7 x VVREFDIG 0 VVREFDIG + 0.3 V 0.3 x VVREFDIG V Software programmable output port: pin SWPORT VOH VOL Isink(max) Isource(max) VOH VOL HIGH-level output voltage LOW-level output voltage maximum sink current maximum source current HIGH-level output voltage LOW-level output voltage VVREFDIG = 1.65 V; pull-up resistance of second device connected to INTX is 18 k, or maximum load current is 100 A VVREFDIG - 0.45 0 250 250 0.2 VVREFDIG 0.45 2000 500 V V A A Interrupt output: pin INTX [1] VVREFDIG - 0.2 0.13 0.22 VVREFDIG + 0.2 V 0.4 V 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 28 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Table 30: Control input and output characteristics ...continued VCCA = VCCD = 2.7 V; Tamb = 25 C; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified. Symbol Isource(max) Rpu tL Parameter maximum source current (pull-down) pull-up resistance LOW time one-shot pulse time; when the LOW period is not shortened by a read action Conditions including internal pull-up resistor Min 260 14.4 9.9 Typ 380 18 9.98 Max 615 22.5 10 Unit A k ms [1] VVREFDIG 1.65 V; Rpu of second device connected to pin INTX is 18 k 20 %. 13. Dynamic characteristics Table 31: Oscillators, clocks and synthesizer characteristics VCCA = VCCD = 2.7 V; VVREFDIG = 1.8 V; Tamb = 25 C; measured with test circuit in Figure 13; all AC values are given in RMS; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified; all RF input values are defined in potential difference (PD), except when EMF is explicitly stated. Symbol fosc VI Ri Ci frsn frsn VIH VIL J frsn frsn Cshunt Cm Rs Parameter oscillator frequency DC input voltage input resistance input capacitance resonance frequency resonance frequency deviation Tamb = -20 C to +75 C duty cycle HIGH-level input voltage LOW-level input voltage jitter resonance frequency resonance frequency deviation shunt capacitance motional capacitance series resistance square wave square wave square wave integrated over 300 Hz to 15 kHz oscillator externally clocked oscillator externally clocked with fi = 32.768 kHz oscillator externally clocked with fi = 32.768 kHz Conditions Min 150 0 500 5 -20 -150 30 0.9 0 -20 1.5 Typ 6 Max 217 1.95 7 Unit MHz V k pF kHz ppm ppm % V V Hz kHz ppm pF fF k Voltage controlled oscillator Reference frequency input: pin FREQIN 32.768 +20 +150 70 1.95 0.55 1 Crystal oscillator input 32.768 kHz: pin XTAL 32.768 +20 3.5 3.0 75 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 29 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Table 31: Oscillators, clocks and synthesizer characteristics ...continued VCCA = VCCD = 2.7 V; VVREFDIG = 1.8 V; Tamb = 25 C; measured with test circuit in Figure 13; all AC values are given in RMS; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified; all RF input values are defined in potential difference (PD), except when EMF is explicitly stated. Symbol Parameter Conditions Min Typ Max Unit Synthesizer Programmable divider D/Dprog programmable divider ratio FRQSETMSB[5:0] = XX01 1111; FRQSETLSB[7:0] = 1111 1111 FRQSETMSB[5:0] = XX00 1000; FRQSETLSB[7:0] = 0000 0000 Dstep(prog) programmable divider step size Charge pump output: pin CPOUT IM(sink) IM(source) peak sink current peak source current VCPOUT = 0.2 V to (VCD1 - 0.2 V); fVCO > fref x div_ratio VCPOUT = 0.2 V to (VCD1 - 0.2 V); fVCO < fref x div_ratio 2 -2 4 -4 8 -8 A A 2048 1 8191 - Table 32: IF counter characteristics VCCA = VCCD = 2.7 V; Tamb = 25 C; measured with test circuit in Figure 13; all AC values are given in RMS; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified; all RF input values are defined in potential difference (PD), except when EMF is explicitly stated. Symbol IF counter N Vsens ncount T length sensitivity voltage count result for search stop period 20 V < VRF < 1 V fxtal = 32768 Hz bit IFCTC = 1 bit IFCTC = 0 fres frequency resolution fxtal = 32768 Hz 15625 1953 4096 s s Hz 31h 7 6 18 3Ch bit V (EMF) Parameter Conditions Min Typ Max Unit Table 33: FM signal channel characteristics VCCA = VCCD = 2.7 V; Tamb = 25 C; measured with test circuit in Figure 13; all AC values are given in RMS; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified; all RF input values are defined in potential difference (PD), except when EMF is explicitly stated. Symbol fi(FM) Vsens(EMF) Parameter FM input frequency sensitivity EMF value voltage fRF = 76 MHz to 108 MHz; L = R; f = 22.5 kHz; fmod = 1 kHz; (S+N)/N = 26 dB; TCdeem = 75 s, A-weighting filter; Baud = 300 Hz to 15 kHz; see Figure 10 f1 = 200 kHz; f2 = 400 kHz; ftune = 76 MHz to 108 MHz; RFagc = off f1 = 4 MHz; f2 = 8 MHz; ftune = 76 MHz to 108 MHz; RFagc = off Conditions Min 76 Typ 2.2 Max Unit 108 3.6 MHz V (EMF) FM RF input: pins RFIN1 and RFIN2 IP3in IP3out in-band 3rd-order intercept point related to VRFIN1-RFIN2 out-of-band 3rd-order intercept point related to VRFIN1-RFIN2 81 87 87 93 - dBV dBV 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 30 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Table 33: FM signal channel characteristics ...continued VCCA = VCCD = 2.7 V; Tamb = 25 C; measured with test circuit in Figure 13; all AC values are given in RMS; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified; all RF input values are defined in potential difference (PD), except when EMF is explicitly stated. Symbol Ri Ci In-band AGC Vi(AGC)(min) Wideband AGC Vi(RF) RF input voltage fRF1 = 93 MHz; fRF2 = 98 MHz; VRF2 = 50 dBV; Vind(IF) / Vi(RF) < 4 mV/dBV; radio tuned to 98 MHz 66 72 78 dBV minimum RF AGC input voltage fRF = 98 MHz; Vind(IF) / Vi(RF) < 4 mV/dBV 55 61 67 dBV Parameter input resistance input capacitance Conditions connected to pin GNDRF connected to pin GNDRF Min 75 2.5 Typ 100 4 Max Unit 125 6 pF IF filter fcenter B S center frequency bandwidth selectivity ftune = 76 MHz to 108 MHz high-side; f = +200 kHz low-side; f = -200 kHz high-side; f = +100 kHz low-side; f = -100 kHz IR image rejection ftune = 76 MHz to 108 MHz; VRF = 50 dBV [1] 215 85 39 32 8 8 24 225 94 43 36 12 12 30 235 102 - kHz kHz dB dB dB dB dB FM IF level detector and mute voltage Level detector RF input VADC(start) Gstep Vind(IF) Vslope(ind)IF ADC start voltage step resolution gain IF indication voltage IF indication voltage slope correct code integrity tested VRF = 0 V VRF = 3 V definition: Vslope(ind)IF = Vind(IF) / VRF; VRF = 10 V to 500 V 2 2 1.5 130 3 3 1.6 165 5 5 V dB Mute output: pin TMUTE 1.75 V V mV/ 20dB k dBA 200 1.55 1.65 1.8 RTMUTE (S+N)/N(m) pin TMUTE output resistance maximum signal-to-noise ratio, VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; TCdeem = 75 s; mono A-weighting filter; Baud = 300 Hz to 15 kHz total harmonic distortion VRF = 1 mV; L = R; fmod = 1 kHz; TCdeem = 75 s; Baud = 300 Hz to 15 kHz f = 75 kHz f = 100 kHz; see Figure 12 280 53 400 57 520 - FM demodulator: MPX output THD - 0.4 - 1 1.5 % % 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 31 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Table 33: FM signal channel characteristics ...continued VCCA = VCCD = 2.7 V; Tamb = 25 C; measured with test circuit in Figure 13; all AC values are given in RMS; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified; all RF input values are defined in potential difference (PD), except when EMF is explicitly stated. Symbol AMsup Parameter AM suppression Conditions L = R; fmod = 1 kHz; VRF = 100 V to 10 mV; m = 0.3; TCdeem = 75 s; Baud = 300 Hz to 15 kHz VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; TCdeem = 75 s; Baud = 300 Hz to 15 kHz Min 40 Typ Max Unit dB FM demodulator output: pin MPXOUT Vo output voltage 60 75 85 mV Ro Isink Vstart(mute) mute MPX decoder ODi cs output resistance sink current mute start voltage mute attenuation relative to VVAFL at VRF = 1 mV; mute = 3 dB VRF = 1 V; L = R; TCdeem = 75 s; Baud = 300 Hz to 15 kHz THD < 3 % VRF = 1 mV; f = 75 kHz; including 9 % pilot deviation; R = 0 and L = 1 or R = 1 and L = 0; fmod = 1 kHz; bit MST = 0; bit SNC = 1; Baud = 300 Hz to 15 kHz VRF = 1 mV; f = 22.5 kHz; L = R; pre-emphasis = 75 s; de-emphasis = 75 s; no audio filter 30 3 10 5 20 500 10 30 A V dB Soft mute; SMUTE = 1; f = 22.5 kHz; fmod = 1 kHz input overdrive range channel separation 4 22 27 - dB dB fu fl (S+N)/N(m) upper -3 dB bandwidth lower -3 dB bandwidth 13 53 15 20 57 17 30 - kHz Hz dBA maximum signal-to-noise ratio, VRF = 1 mV; f = 22.5 kHz; L = R; mono fmod = 1 kHz; TCdeem = 75 s; Baud = 300 Hz to 15 kHz; A-weighting filter maximum signal-to-noise ratio, VRF = 1 mV; f = 22.5 kHz; L = R; stereo fmod = 1 kHz; fpilot = 6.75 kHz; TCdeem = 75 s; Baud = 300 Hz to 15 kHz; A-weighting filter total harmonic distortion, stereo pilot suppression VRF = 1 mV; f = 75 kHz; L = R; including 9 % pilot deviation; fmod = 1 kHz; TCdeem = 75 s measured at pins VAFL and VAFR related to f = 75 kHz; fmod = 1 kHz; TCdeem = 75 s VRF = 1 mV; bit STEREO = 1 VRF = 1 mV; bit STEREO = 0 definition: fpilot(hys) = fpilot1 / fpilot2; VRF = 1 mV VRF = 1 mV bit DTC = 1 bit DTC = 0 (S+N)/N(s) 49 53 - dBA THD - 0.9 2.5 % sup(pilot) 40 50 - dB fpilot1 fpilot2 hys(pilot) TCdeem pilot frequency deviation 1 pilot frequency deviation 2 pilot tone detection hysteresis de-emphasis time constant 2.5 1.0 2 - 5.8 3.6 6 kHz kHz dB 38 57 50 75 62 93 s s 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 32 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Table 33: FM signal channel characteristics ...continued VCCA = VCCD = 2.7 V; Tamb = 25 C; measured with test circuit in Figure 13; all AC values are given in RMS; minimum and maximum values include spread due to the applied voltage from 2.5 V to 3.6 V and process spread; unless otherwise specified; all RF input values are defined in potential difference (PD), except when EMF is explicitly stated. Symbol VVAFL VVAFR Parameter Conditions Min 60 60 Typ 75 75 Max Unit 90 90 mV mV MPX decoder output: pins VAFR and VAFL left audio output voltage on pin VRF = 1 mV; L = R; f = 22.5 kHz; VAFL fmod = 1 kHz; TCdeem = 75 s right audio output voltage on pin VAFR VRF = 1 mV; L = R; f = 22.5 kHz; fmod = 1 kHz; TCdeem = 75 s definition: VO(VAFL-VAFR) output voltage difference between pins VAFL and VAFR VO(VAFL-VAFR) = VVAFL / VVAFR; VRF = 1 mV; L = R; f = 75 kHz; fmod = 1 kHz, including 9 % pilot deviation; TCdeem = 75 s RO(VAFL) RO(VAFR) Isink(VAFL) Isink(VAFR) Vstart(blend) output resistance pin VAFL output resistance pin VAFR sink current on pin VAFL sink current on pin VAFR blend start voltage stereo channel separation = 1 dB; with increasing input levels the radio switches gradually from mono to stereo VRF = 40 V; f = 75 kHz; R = 0 and L = 1 or R = 1 and L = 0; including 9 % pilot deviation; fmod = 1 kHz; bit MST = 0 MST = 0; R = 1 and L = 0 or R = 0 and L=1 from mono to stereo with increasing RF input level from stereo to mono with decreasing RF input level Vsw hys switching voltage hysteresis MU = LHM = RHM = 0 MU = LHM = RHM = 1 MU = LHM = RHM = 0 MU = LHM = RHM = 1 -0.5 - +0.5 dB 50 500 50 500 170 170 7 10 100 100 18 k k A A V Mono stereo blend: bit SNC = 1 cs channel separation 4 10 16 dB Mono stereo switching; f = 75 kHz including 9 % pilot deviation; fmod = 1 kHz; SNC = 0 cs channel separation 22 25 1 35 3 1 60 4 dB dB V dB Bus driven mute functions Tuning mute; AFM = 1 mute mute(VAFR) mute(VAFL) [1] mute depth on pins VAFL and VAFR mute depth on pin VAFR mute depth on pin VAFL bit AFM = 1 bit AFM = 1; bit RHM = 1 bit AFM = 1; bit LHM = 1 -60 -80 -80 - - dB dB dB Low-side and high-side selectivity can be measured by changing the mixer LO injection from high-side to low-side. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 33 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 10 VVAFR, VVAFL (dBA) -10 (1) 001aab491 4 THD, N (%) 3 -30 2 -50 (2) (3) 1 -70 10-7 10-6 10-5 10-4 10-3 10-2 0 10-1 1 VRFIN1, VRFIN2 (V) (1) Mono signal: soft mute off, f = 22.5 kHz. (2) Noise in Mono mode, soft mute off, f = 0 kHz. (3) Total harmonic distortion, f = 75 kHz. Fig 10. FM characteristics mono 10 VVAFR, VVAFL (dBA) -10 (1) 001aab490 4 THD, N (%) 3 (2) -30 2 -50 (3) (4) 1 -70 10-7 (5) 10-6 10 10-4 10-3 10-2 0 10-1 1 VRFIN1, VRFIN2 (V) (1) VAFL signal, modulation left, SNC on, f = 67.5 kHz; fpilot = 6.75 kHz. (2) VAFR signal, modulation left, SNC on, f = 67.5 kHz; fpilot = 6.75 kHz. (3) Noise in Stereo mode, SNC on, f = 0 kHz; fpilot = 6.75 kHz. (4) Total harmonic distortion: f = 67.5 kHz; fpilot = 6.75 kHz. (5) Noise in Mono mode, SNC off, f = 0 kHz; fpilot = 0 kHz. Fig 11. FM characteristics stereo 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 34 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 10 VVAFL, VVAFR (dBA) -10 (1) 001aab492 3.5 THD (%) 2.5 2.0 -30 1.5 1.0 -50 (3) 0.5 (2) 0 -70 10-1 1 10 102 103 104 105 106 VRF (VEMF) (1) Mono signal, soft mute on, f = 22.5 kHz. (2) Noise in Mono mode, soft mute on, f = 0 kHz. (3) Total harmonic distortion, f = 100 kHz. Fig 12. FM characteristics mono, soft mute active and THD at 100 kHz deviation 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 35 of 44 xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x Product data sheet Rev. 01 -- 2 August 2006 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. 9397 750 13451 14. Application information Philips Semiconductors n.c. GNDA F2 FREQIN G1 XTAL F1 X1 VCCA E1 3.7 33 nF i.c. GNDA G2 G3 MPXOUT G4 VAFL F4 VAFR TMUTE G5 G6 F6 CRYSTAL OSCILLATOR GAIN STABILIZER TEA5761UK CD3 33 nF D2 IF FILTER LIMITER DEMODULATOR SOFT MUTE SDS FM antenna 10 nF LEVEL ADC I/Q MIXER 1st FM /2 N1 IF CENTER FREQUENCY ADJUST AGC IF COUNT MPX DECODER Iref G7 INTX F7 GNDD E6 i.c. E7 CD2 mono pilot 12 D7 VCCD 33 nF 100 pF 27 pF L1 120 nH 47 pF RFIN1 D1 RFIN2 C1 GNDRF C2 CAGC B1 agc prog. div out ref. div out TUNING SYSTEM I2C-BUS INTERFACE D6 GNDD C7 GNDD B7 SDA A7 SCL Low voltage single-chip FM stereo radio MUX VCO A1 LOOPSW 10 nF SW PORT A3 LO2 A4 CD1 B4 A5 SWPORT A6 BUSENABLE B6 VREFDIG 001aab486 B2 CPOUT 100 nF A2 LO1 n.c. 10 k L2 39 nH TEA5761UK 100 k 33 nF Total of 15 external components. 36 of 44 Fig 13. Application diagram Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio List of components Component L1 Description RF band filter coil Type 120 nH; 0603CS series or equivalent; Qmin = 20; tolerance: 5 % 39 nH to 47 nH; 0603CS series or equivalent; Qmin = 25; tolerance: 5 % 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) 10 % (max) Manufacturer Coilcraft, Murata, Epcos, Panasonic Coilcraft, Murata, Epcos, Panasonic Table 34: Number 1 2 L2 VCO coil 3 4 5 6 7 8 9 10 11 12 13 14 15 X1 R C 32.768 kHz crystal see Table 31 10 k 100 k 27 pF 47 pF 100 pF 10 nF 10 nF 33 nF 33 nF 33 nF 33 nF 100 nF Table 35: DC operating points VCCA = VCCD = VVREFDIG = 2.7 V. Symbol LOOPSW LO1 LO2 CD1 SWPORT BUSENABLE SCL CAGC CPOUT n.c. VREFDIG SDA RFIN2 GNDRF GNDD RFIN1 CD3 GNDD 9397 750 13451 Ball A1 A2 A3 A4 A5 A6 A7 B1 B2 B4 B6 B7 C1 C2 C7 D1 D2 D6 Mode Active 2.6 1.8 1.8 2.6 0.2 2.7 1.2 0.5 to 2.5 0 2.7 0.5 0 0 0.5 2.6 0 Standby 2.7 2.7 2.7 2.7 0.2 2.7 2.2 0 0 2.7 0 0 0 0 2.7 0 Unit V V V V V V V V V V V V V V V V V V (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 37 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio Table 35: DC operating points ...continued VCCA = VCCD = VVREFDIG = 2.7 V. Symbol VCCD VCCA i.c. CD2 XTAL GNDA VAFL i.c. GNDD FREQIN (no load) TRIGFR = 0 TRIGFR = 1 GNDA n.c. MPXOUT VAFR TMUTE INTX G2 G3 G4 G5 G6 G7 Ball D7 E1 E6 E7 F1 F2 F4 F6 F7 G1 Mode Active 2.7 2.7 0 2.7 1.7 0 0.8 0 0 0 1.5 0 0 0.8 0.8 1.9 2.7 Standby 2.7 2.7 0 2.7 2.5 0 0 0 0 0 0 0 2.4 0 2.3 2.7 V V V V V V V V V V V V V V V V V V Unit 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 38 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 15. Package outline WLCSP34: wafer level chip-size package; 34 bumps; 3.5 x 3.5 x 0.6 mm TEA5761UK D B A bump A1 index area A2 E A A1 detail X e1 e b v w M M C CAB C y G F e E D C B A 1 2 3 4 5 6 7 X 1 scale DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.64 A1 0.26 0.22 A2 0.38 0.34 b 0.34 0.30 D 3.6 3.5 E 3.6 3.5 e 0.5 e1 3 e2 3 v 0.01 w 0.04 y 0.02 2 3 mm e2 0 OUTLINE VERSION TEA5761UK REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-11-28 05-12-02 Fig 14. Package outline TEA5761UK (WLCSP34) 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 39 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 16. Soldering 16.1 Introduction to soldering WLCSP packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering WLCSP packages can be found in "AN10365. Application note for wafer level CSPs". Wave soldering is not suitable for this package. 16.2 Reflow soldering process Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 16.2.1 Solder reflow profile tp Tp temperature TL Tsmax tL ramp-up critical zone TL to Tp Tsmin ts preheat ramp-down 25 C t 25C to peak time 001aac838 Tp = 260 C. TL = 217 C. Tsmin = 150 C. Tsmax = 200 C. tp = 20 s to 40 s. tsmin to tsmax = 60 s to 180 s. Time from 25 C to peak temperature is maximal 8 minutes. Fig 15. Solder reflow profile 16.2.2 Quality of solder joint A flip-chip joint is considered to be a good joint when the entire solder land has been wetted by the solder from the bump. The surface of the joint should be smooth and the shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps after reflow can occur during the reflow process in bumps with high ratio of bump diameter to bump height, i.e. low bumps with large diameter. No failures have been found to be related to these voids. Solder joint inspection after reflow can be done with X-ray to monitor defects such as bridging, open circuits and voids. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 40 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 16.2.3 Rework In general, rework is not recommended. By rework we mean the process of removing the chip from the substrate and replacing it with a new chip. If a chip is removed from the substrate, most solder balls of the chip may be damaged. In that case it is recommended not using the chip again. Device removal can be done when the substrate is heated until it is certain that all solder joints are molten. The chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. The surface of the substrate should be carefully cleaned and all solder and flux residues and/or underfill removed. When a new chip is placed on the substrate, use the flux process instead of solder on the solder lands. Apply flux on the bumps at the chip side as well as on the solder pads on the substrate. Place and align the new chip while viewing with a microscope. To reflow the solder, use the solder profile shown in this document. 16.2.4 Cleaning Cleaning can be done after reflow soldering. 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 41 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 17. References [1] [2] [3] The I2C-bus specification -- version 2.1 January 2000 JESD22-C101 -- JEDEC standard for CDM test AN10365 -- Application note for wafer level CSPs 18. Revision history Table 36: Revision history Release date 20060802 Data sheet status Product data sheet Change notice Doc. number 9397 750 13451 Supersedes Document ID TEA5761UK_1 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 42 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 19. Data sheet status Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 20. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 22. Trademarks Notice -- All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- logo is a trademark of Koninklijke Philips Electronics N.V. 21. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 23. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 13451 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 -- 2 August 2006 43 of 44 Philips Semiconductors TEA5761UK Low voltage single-chip FM stereo radio 24. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 8.10 8.11 8.12 8.13 8.13.1 8.13.2 8.13.3 8.14 8.15 8.16 8.17 8.18 8.19 8.20 8.20.1 8.20.2 8.20.3 8.20.4 9 9.1 9.1.1 9.1.2 9.1.3 9.2 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Low noise RF amplifier . . . . . . . . . . . . . . . . . . . 6 I/Q mixer 1st FM . . . . . . . . . . . . . . . . . . . . . . . . 6 VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . 6 PLL tuning system . . . . . . . . . . . . . . . . . . . . . . 7 Band limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Local or long distance receive . . . . . . . . . . . . . 8 IF filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 FM demodulator . . . . . . . . . . . . . . . . . . . . . . . . 8 IF counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Voltage level generator and analog-to-digital converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Hard mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Audio frequency mute . . . . . . . . . . . . . . . . . . . . 9 MPX decoder . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Signal dependent mono/stereo blend (stereo noise cancellation) . . . . . . . . . . . . . . . . . . . . . . 9 Software programmable port . . . . . . . . . . . . . . 9 Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . 10 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 10 I2C-bus interface . . . . . . . . . . . . . . . . . . . . . . . 10 Auto search and Preset mode . . . . . . . . . . . . 10 Search mode . . . . . . . . . . . . . . . . . . . . . . . . . 10 Preset mode . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Auto high-side and low-side injection stop switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Muting during search or preset . . . . . . . . . . . . 13 Interrupt handling . . . . . . . . . . . . . . . . . . . . . . 13 Interrupt register . . . . . . . . . . . . . . . . . . . . . . . 13 Interrupt clearing. . . . . . . . . . . . . . . . . . . . . . . 14 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Interrupt flags and behavior . . . . . . . . . . . . . . 16 9.2.1 9.2.2 9.2.3 9.2.4 9.2.5 9.3 10 10.1 10.2 10.3 10.4 11 12 13 14 15 16 16.1 16.2 16.2.1 16.2.2 16.2.3 16.2.4 17 18 19 20 21 22 23 Multiple interrupt events . . . . . . . . . . . . . . . . . IF frequency flag . . . . . . . . . . . . . . . . . . . . . . RSSI threshold flag . . . . . . . . . . . . . . . . . . . . Frequency ready flag . . . . . . . . . . . . . . . . . . . Band limit flag. . . . . . . . . . . . . . . . . . . . . . . . . Interrupt output. . . . . . . . . . . . . . . . . . . . . . . . I2C-bus interface . . . . . . . . . . . . . . . . . . . . . . . Write and Read mode . . . . . . . . . . . . . . . . . . Data transfer. . . . . . . . . . . . . . . . . . . . . . . . . . Register map . . . . . . . . . . . . . . . . . . . . . . . . . Byte description . . . . . . . . . . . . . . . . . . . . . . . Limiting values . . . . . . . . . . . . . . . . . . . . . . . . Static characteristics . . . . . . . . . . . . . . . . . . . Dynamic characteristics . . . . . . . . . . . . . . . . . Application information . . . . . . . . . . . . . . . . . Package outline . . . . . . . . . . . . . . . . . . . . . . . . Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction to soldering WLCSP packages. . Reflow soldering process . . . . . . . . . . . . . . . . Solder reflow profile . . . . . . . . . . . . . . . . . . . . Quality of solder joint . . . . . . . . . . . . . . . . . . . Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . Data sheet status. . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information . . . . . . . . . . . . . . . . . . . . 16 16 16 17 17 17 18 18 18 20 21 27 28 29 36 39 40 40 40 40 40 41 41 42 42 43 43 43 43 43 (c) Koninklijke Philips Electronics N.V. 2006 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 2 August 2006 Document number: 9397 750 13451 Published in The Netherlands |
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